The present invention generally relates to the field of packages for high frequency electronic devices, and specifically relates to a single layer surface mount package having a lead frame partially embedded in a dielectric material and covered by a cap for housing a high frequency electronic device, and for mounting and connecting the high frequency electronic device to a circuit.
Integrated circuit technologies continue to advance producing devices with higher speeds, frequencies, powers, and functional complexity. These attributes are realized with smaller and smaller electronic devices by effective control and management of wafer-scale interconnect technology. An important component of integrated circuit technologies is the packaging for these high performance electronic devices. In addition to providing a transparent transition from the electronic device to a next level of assembly, such as a circuit board, packages must be suitable for cost-effective surface mounting methods which utilize highly automated systems to assemble the circuit boards.
As the frequencies and/or the speeds of the electronic devices increase, the available packaging becomes the chief inhibitor to electrical response. Very high frequency signals degrade as the signals attempt to propagate through the electrical constructions and interconnects of the packages. Impedance discontinuities caused by the leads, and interconnections between the leads and mating lead pads on the package and on the next level of assembly cause unacceptable signal distortions. The signals also encounter cavity resonances or waveguide modes fostered by the structural configurations of the packages. Due to these packaging deficiencies, very few, if any, of the available surface mounting packages are capable of efficient transmission of signals higher than a few Gigahertz in frequency.
Packages of the prior art that address the signal performance problems described above are typically formed from several layers including a conductive base, a ceramic circuit substrate, a ceramic seal ring substrate and a lid as disclosed in U.S. Pat. No. 5,465,008 of Goetz et al. and U.S. Pat. No. 5,735,972 of Wein et al. These packages utilize one or a combination of microstrip transmission lines, stripline transmission lines, and embedded microstrip lines to provide a conductive path from the electronic device to the edge of the package for wire-bonding to the next level of assembly. Microstrip transmission lines are conductors above a ground plane separated from the ground plane by a dielectric. The impedance of a microstrip transmission line is a function of the dielectric, the line width, and the thickness of the dielectric. Stripline transmission lines are conductors through a dielectric placed between two ground planes. The impedance of a stripline transmission line is a function of the dielectric, the line width, and the thickness of the dielectric above and below the conductor. Embedded microstrips are similar to the stripline transmission lines, but do not include the top ground plane. These transmission line types are formed on the circuit substrate of the package to provide a connection from the electronic device to the edge of the package which minimizes signal degradation. The transmission lines are precisely dimensioned to provide a continuous 50 ohm impedance.
The prior art packages minimize signal degradation utilizing multiple layers of dielectric substrates, a series of conductive elements to form transmission lines on at least one of the dielectric substrates, and an internal ground plane. The multiple layers are bonded together in a complicated manufacturing process to form the high frequency package which must be hand assembled onto the next level assembly circuit after the low frequency devices are surface mounted to the circuit. Thus, the manufacturing steps are numerous, complicated, costly and time consuming.
FIGS. 1a and 1b illustrate a top and a bottom view, respectively, of an improved prior art package 10 utilizing the embedded microstrip construction which may be surface mounted onto a circuit. The surface mount package 10 includes a conductive lead frame 14 attached to the bottom of a dielectric or ceramic ring 12. The lead frame 14 consists of an array of leads 20 and a die attach or ground plane portion 24 which, typically, is centered with a cavity 22 of the dielectric ring 12. The dielectric ring 12 includes conductive traces 26 which are formed on the top of the dielectric ring 12 and extend from the cavity 22 to the sides of the of the dielectric ring 12. A chip or electronic device (not shown) is placed inside a cavity 22 of the dielectric ring 12, and the electronic device is connected to the conductive traces 26 by wire bonds.
Each conductive trace 26 used for transmission of signals to or from the electronic device typically includes a conductive pad area 16 which is wider than the trace 26 for the purpose of impedance matching of the transmission line between the packaged electronic device and the circuit. The leads 20 on the bottom of the ceramic body 12 make electrical connections to the conductive pads 16 by means of circular open vias, or half vias 18, on the sides of the ceramic body 12. Following placement of a electronic device in the cavity 22, a ceramic lid (not shown) is bonded to the top side of the ceramic ring 12 to cover the electronic device within the cavity 22. The lid, the conductive traces 26 and pads 16 and the ground plane portion 24 of the lead frame 14 form embedded microstrips of the prior art package 10.
The surface mount package 10 of the prior art illustrated in FIGS. 1a and 1b addresses the concerns of transmission of signals for high frequency devices and has fewer layers than the typical multi-layered package. The die attach area 24 serves as the ground plane when the package 10 is surface mounted to the ground plane of the next higher assembly. Although the surface mount package 10 eliminates the need for the individual connection and insertion of the package onto the next level assembly, this surface mount package 10 still requires a number of difficult manufacturing steps to complete the package, e.g., forming the ceramic body 12 with the half vias 18, forming the conductive traces 26 on the ceramic body, matching impedances by exact dimensioning of the pads 16 and conductive traces 26, etc. The manufacturing steps required for these packages 10 are time-consuming and expensive, and may negatively impact the reliability of the device.
Therefore, a need remains for an easy-to-manufacture surface mountable microelectronic package which allows attachment of both low frequency and high frequency devices by the same, low cost surface mounting techniques, and that does not present deficiencies of the above-described prior art packages.
It is an advantage of the present invention to provide a single layer surface mount package suitable for low frequency as well as very high frequency electronic devices.
Another advantage is to provide a single layer surface mount package consisting of a lead frame embedded in a dielectric that is easy to manufacture and that is capable of efficient transmission of signals higher than a few Gigahertz in frequency.
It is yet another advantage to provide an economical method for manufacturing a surface mount package that eliminates the need for producing multiple shaped substrates, forming conductive traces on at least one of the substrates, and positioning and bonding the substrate layers.
In an exemplary embodiment of the present invention, a surface mount package suitable for high-frequency electronic devices consists of a single base layer for holding an electronic device and a cap for covering the electronic device. The single base layer includes a conductive lead frame having an outside frame portion, a die attach portion, and any desired number of leads for connection to the next assembly level circuit. The leads are attached to the outside frame portion and extend inward so that they are adjacent to but do not touch, the die attach portion. At least one of the leads is connected to the die attach portion which has sufficient area for supporting an electronic device, and which typically acts as a ground plane. A dielectric material is formed, poured or molded between the leads and the die attach portion of the lead frame to produce the single base layer such that the lead frame is exposed on both the top and the bottom sides of the single base layer. In another embodiment of the exemplary embodiment, the dielectric material is formed to cover the leads on the bottom side of the base layer such that only the die attach portion is exposed. An electronic device sits on the die attach portion on the top side of the base layer, and the signal lines of the electronic device are bonded, e.g., wire-bonded to an adjacent lead. The cap or lid is bonded directly to the base layer to enclose the electronic device.
The leads of the surface mount package of the exemplary embodiment may be surface mounted onto the circuit of the next level assembly with other high or low frequency surface mountable devices. The next level assembly incorporates the necessary impedance matching for the single layer surface mount package leads as well as the ground plane for the die attach portion of the package. Thus, the present invention eliminates the need for special manufacturing of multiple package layers, including separate ground planes, special formation of traces for impedance matching, and separate attachment of the package to the next level assembly.
In an exemplary method of manufacturing the surface mount package of the present invention, the leads and the die attach, or center, portion of a lead frame are placed inside a mold or injection molding device. A suitable dielectric material, such as a ceramic, is formed around a first length of the leads and the die attach portion to produce a single base layer. The term xe2x80x9cformxe2x80x9d is used herein to indicate any suitable method of molding the dielectric material including melting of a power or a preform, injecting or pumping of liquid into a form, sintering of powder in place, or reactive curing of a martial. A second length of the leads, which are attached to the outside frame portion, remain fully exposed to serve as the package leads for bonding to the next assembly level circuit. The thickness or height of the molded dielectric material matches the thickness of the lead frame such that the leads and center base portion are exposed on the upper and lower sides of the single layer surface mount package of the exemplary embodiment. Alternatively, the dielectric is minimally thicker than the lead frame to cover the leads on the bottom surface of the package. An electronic device is placed on the top surface of the die attach portion of the base layer, and the signal lines of the electronic device are attached to the leads using, e.g., wire bonding techniques. A cap is placed over the electronic device and bonded directly to the single base layer. The outside frame portion is removed from the lead frame so that the packaged electronic device is ready for surface mounting on the circuit of the next level assembly.
In a second exemplary embodiment, the dielectric material is molded into the lead frame and includes a dielectric ring projecting to a desired height above the top surface of the lead frame. The raised dielectric ring provides a cavity for accepting the electronic device. The dielectric ring is molded along the perimeter of a predetermined package edge and has a ring width such that an inside portion of the leads as well as the die attach area remain exposed. A flat lid or a cap may then be utilized as a package cover and bonded directly to the raised dielectric ring. The raised dielectric ring adds additional protection for the enclosed electronic device as well as added structural support for the package. The use of a simple flat lid is often less expensive, and may be of particular advantage if the package requires an optical window to close it. An optical lid may be a simple flat optical plate of glass, sapphire, or a material which is sufficiently transparent to the portion of the spectrum of interest.
In other exemplary embodiments, the projecting dielectric ring may be of any desired height and width as long as a sufficient area of the die attach area remains exposed for accepting the electronic device, and a portion of the leads remain exposed for a connection to the signal lines of the electronic device.
The exemplary embodiments of the single layer surface mount leaded packages, as described above, provide innovative improvements over the prior art packages. The single layer surface mount leaded package is universal in that it accepts both low frequency and high frequency devices. A single layer, multi-use package allows circuit manufactures to minimize inventory requirements. The complexity of the package is reduced dramatically requiring only a lead frame embedded in a dielectric and a cap. The use of fewer package elements permits efficient and cost-effective production of the packages. In addition, the configuration of a dielectric formed into the lead frame provides the package leads with mechanical stability that is not present in the prior art inventions.
Further advantages of the inventive package of the exemplary embodiments are realized in the reduced size of the package. The leads of prior art packages are separated by air or by vacuum. A sufficiently large separation is required to prevent interference between the signals on adjacent leads. In contrast, the surface mount leaded package of the exemplary embodiment may be constructed to have a footprint only slightly larger than that of the enclosed electronic device because the dielectric molded between the leads provides a higher resistance as compared to the air or vacuum separation.
The method of molding the dielectric around the lead frame also provides a comparatively easy means for adjusting the geometry of the leads to the particular application either within the circuit or to the external next level of assembly as any desired configuration of the lead frame can be utilized in the molding process. Finally, those skilled in the art of transmission line design will recognize that the electrical performance at high frequencies may be realized for any enclosed electronic device by adjusting the geometry of the electrical traces within the pattern of the leads.